A novel five-level semi-bridgeless power factor correction topology

Abstract

This paper proposes a novel topology of a multilevel converter for power factor correction (PFC) applications. The proposed topology, with a split dc-link, can produce five distinct voltage levels with a reduced number of power devices. Inherently, the proposed topology operates with unitary power factor, sinusoidal grid current, and controlled dc-link voltage. The functional principle of the proposed topology is described in detail to show its benefits compared to the classical PFC topologies. The current control methodology adopts the discrete-time nature of the topology to define the distinct states throughout a control period. A laboratorial prototype was developed to validate the proposed topology under real conditions of operation, and the hardware structure and the implemented control algorithm are presented in this paper. The experimental validation shows a grid current with reduced harmonic distortion, a controlled voltage in the split dc-link, and a unitary power factor operation.