Design of a folded-patch chip-size antenna for short-range communications

Abstract

We report on design of an integrated folded shorted-patch (FSP) chip-size antenna for operation at 5.7 GHz and use in short-range wireless communications. Application of wafer-level chip-scale packaging (WLCSP) techniques like adhesive wafer bonding and through-wafer electrical via formation, combined with the selected antenna type allows antenna on-chip integration. The operating characteristics of a folded S-P antenna built on two stacked glass substrates were analysed with respect to substrate thickness, middle patch length and substrate sidewall angles. Antenna size reduction down to 4x4x1 mm3, efficiency of 66% and bandwidth of 62 MHz are predicted.