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TitleCache full-virtualization for the PowerPC 405-S
Author(s)Carvalho, Adriano
Afonso, Francisco
Cardoso, Paulo
Cabral, Jorge
Ekpanyapong, Mongkol
Montenegroz, Sergio
Tavares, Adriano
Issue date2013
Abstract(s)As real-time embedded systems become overwhelmingly complex, hypervisor-based architectures are increasingly being used. Hypervisor-based architectures can support such level of complexity and, at the same time, provide real-time performance while reducing the size, cost and time-to-market of such systems. Modern processors provide cache facilities which can increase their performance substantially. Similarly, in hypervisor-based architectures, by providing virtual machines (VM) with such facilities a significant improvement in their performance can be obtained as we conclude in this work. This article presents a methodology to fully virtualize the cache facilities of the IBM PowerPC 405-S. To the best of our knowledge, this is the first time cache virtualization is openly described. A careful mapping between a VM's cache-related configuration and the processor's configuration is done, accompanied by the emulation of 5 cache-related privileged instructions. Even though some issues have been detected, a simple solution is provided for all of them. The results show that cache virtualization works with minimal virtualization overhead.
TypeConference paper
AccessRestricted access (UMinho)
Appears in Collections:CAlg - Artigos em livros de atas/Papers in proceedings

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