Please use this identifier to cite or link to this item: https://hdl.handle.net/1822/1629

TitleCharacterization of high-resistivity polycrystalline silicon substrates for wafer-level packaging and integration of RF passives
Author(s)Bartek, M.
Polyakov, A.
Sinaga, S. M.
Mendes, P. M.
Correia, J. H.
Burghartz, J. N.
KeywordsWafer level packaging
Radio frequency (RF) integration
Issue dateOct-2004
PublisherIEEE
CitationASDAM. INTERNATIONAL CONFERENCE ON ADVANCED SEMICONDUCTOR DEVICES AND MICROSYSTEMS, 5, Smolenice Castle, 2004 - "Proceedings". Piscataway : IEEE, 2004. ISBN 0-7803-8535-7. p. 227-230.
Abstract(s)High-resistivity polycrystalline silicon (HRPS) wafers are explored as a novel low-cost and low-loss substrate for radio-frequency (RF) passive components in wafer-level packaging (WLP) and integrated passive networks. A record quality factor (Q=11; 1 GHz; 34 nH) and very low loss (0.65 dB/cm; 17 GHz) are demonstrated for inductors and coplanar wave guides, respectively. The waferlevel packaging solution is based on an adhesive bonding of a passive HRPS wafer to an active silicon IC wafer, where the HRPS wafer serves as a mechanical carrier and vertical spacer. This enables integration of large RF passives with a vertical spacing of >150 µm to the conductive silicon substrate containing the circuitry, while providing mechanical stability, reducing form factor and avoiding any additional RF loss. The HRPS substrates have high dielectric constant, low RF loss, high thermal conductivity, perfect thermal matching, and processing similar to the single-crystalline silicon.
TypeConference paper
URIhttps://hdl.handle.net/1822/1629
ISBN0-7803-8535-7
Peer-Reviewedyes
AccessOpen access
Appears in Collections:DEI - Artigos em atas de congressos internacionais

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